Product Summary

The EPM7064AETC44-4N is a high-density, highperformance device based on Altera second-generation MAX architecture. Fabricated with advanced CMOS technology, the EPM7064AETC44-4N operates with a 3.3-V supply voltage and provides 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. MAX 7000A devices in the -4, -5, -6, -7, and some -10 speed grades are compatible with the timing requirements for 33 MHz operation of the PCI Special Interest Group.

Parametrics

EPM7064AETC44-4N absolute maximum ratings: (1)VCC Supply voltage With respect to ground: –0.5~4.6 V; (2)VI DC input voltage: –2.0~5.75 V; (3)IOUT DC output current, per pin: –25~25 mA; (4)TSTG Storage temperature No bias: –65~150 ℃; (5)TA Ambient temperature Under bias: –65~135 ℃; (6)TJ Junction temperature BGA, FineLine BGA, PQFP, and TQFP packages, under bias: 135 ℃.

Features

EPM7064AETC44-4N features: (1)High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAXR) architecture (see Table 1); (2)3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability; (3)Built-in boundary-scan test (BST) circuitry compliant with; (4)IEEE Std. 1149.1; (5)Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71; (6)Enhanced ISP features; (7)Pin-compatible with the popular 5.0-V MAX 7000S devices; (8)High-density PLDs ranging from 600 to 10,000 usable gates; (9)Extended temperature range.

Diagrams

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